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authorSalvatore Bonaccorso <carnil@debian.org>2022-02-14 19:42:42 +0100
committerSalvatore Bonaccorso <carnil@debian.org>2022-02-14 19:42:42 +0100
commitb1c2b8bf3d490bd1a67cf04140ee6dc489c883fc (patch)
tree3e57f07373ea00aedc1556ab1f7c0a3af257bc80
parent30627df0937e998533df8fd175245fe3be1115c4 (diff)
postpone intel-microcode, the update should first be exposed in upper suites
-rw-r--r--data/CVE/list.20218
1 files changed, 8 insertions, 0 deletions
diff --git a/data/CVE/list.2021 b/data/CVE/list.2021
index 7dc04d4b94..308be9088c 100644
--- a/data/CVE/list.2021
+++ b/data/CVE/list.2021
@@ -33384,6 +33384,8 @@ CVE-2021-33121
RESERVED
CVE-2021-33120 (Out of bounds read under complex microarchitectural condition in memor ...)
- intel-microcode <unfixed>
+ [bullseye] - intel-microcode <postponed> (Wait until exposed in unstable; tendency to point release)
+ [buster] - intel-microcode <postponed> (Wait until exposed in unstable; tendency point release)
NOTE: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00589.html
CVE-2021-33119 (Improper access control in the Intel(R) RealSense(TM) DCM before versi ...)
NOT-FOR-US: Intel
@@ -70564,10 +70566,14 @@ CVE-2021-0147 (Improper locking in the Power Management Controller (PMC) for som
TODO: check
CVE-2021-0146 (Hardware allows activation of test or debug logic at runtime for some ...)
- intel-microcode <unfixed>
+ [bullseye] - intel-microcode <postponed> (Wait until exposed in unstable; tendency to point release)
+ [buster] - intel-microcode <postponed> (Wait until exposed in unstable; tendency point release)
NOTE: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00528.html
NOTE: https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20220207
CVE-2021-0145 (Improper initialization of shared resources in some Intel(R) Processor ...)
- intel-microcode <unfixed>
+ [bullseye] - intel-microcode <postponed> (Wait until exposed in unstable; tendency to point release)
+ [buster] - intel-microcode <postponed> (Wait until exposed in unstable; tendency point release)
NOTE: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00561.html
NOTE: https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/fast-store-forwarding-predictor.html
CVE-2021-0144 (Insecure default variable initialization for the Intel BSSA DFT featur ...)
@@ -70612,6 +70618,8 @@ CVE-2021-0128
RESERVED
CVE-2021-0127 (Insufficient control flow management in some Intel(R) Processors may a ...)
- intel-microcode <unfixed>
+ [bullseye] - intel-microcode <postponed> (Wait until exposed in unstable; tendency to point release)
+ [buster] - intel-microcode <postponed> (Wait until exposed in unstable; tendency point release)
NOTE: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00532.html
NOTE: https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20220207
CVE-2021-0126

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